The present invention relates to optical fiber array apparatus and more particularly to such apparatus that includes a front mask, plate, or wafer having a matrix of small holes and an optical fiber secured in each hole. Examples of these types of apparatus are disclosed in U.S. Pat. No. 5,907,650, U.S. application Ser. No. 09/841,686 now U.S. Pat. No. 6,470,123 and WIPO Publication WO 1/94995 A2. There is a constant need in the art to increase the fiber/hole density in the array apparatus. In the last few years, hole density has increased from 10xc3x9710 arrays to as high as 64xc3x9764 and higher.
Serious problems arise in the art related to hole positioning and dimensions. In the last several years, manufacturers have turned to using silicon wafers and photo-etching the holes using microchip photo-etching techniques in order to form a matrix of holes with acceptable tolerances. Generally, etching a nominal 125 micron hole in a 400 micron thick wafer can be achieved with a xc2x12 micron tolerance.
Applicants have found however that such tolerance is unacceptable for a number of reasons. First, the method used by most wafer manufacturers to measure hole sizes in a substrate (e.g., a silicon wafer) is to use a non-contact method of measuring. The problem with trying to measure very small deep holes this way is that the light intensity can vary from hole to hole and change the apparent size of the hole the camera detects. In most cases this variation is small (0.5-1 micron) but this small variation in measurements to the actual sizes may cause a problem when added to other variations. Second, no two measuring systems measure exactly the same. For example, often the wafer manufacturer has a different hole measuring system than the array apparatus manufacturer. The former may use an electron microscope while the latter may use a microviewer. These two systems would likely yield different readings for the same hole dimension. Third, aside from the first mentioned problem, the accuracy of the optical measurement system itself is about xc2x11 micron.
Accordingly, there is a need in the art for the wafer manufacturer to know the actual size/dimension of the holes in the dies or arrays formed on a wafer substrate so that the wafer manufacturer can take steps to adjust the hole size or know the actual hole size before shipment. Holes sizes can be enlarged by up to several microns by re-oxidizing the hole interior and re-removing the oxide layer off the hole interior. Hole sizes can be reduced by re-oxidizing and re-removing only the surface layer from the front (and rear) surface of the re-oxidized wafer, leaving the re-oxidized layer on the hole interior wall.
The present invention solves the forgoing problems and enables the wafer and array apparatus manufacturers to know the precise hole size without the use of optical instruments by forming a series of metrology holes at one or more locations of the wafer. For array holes to be, e.g., 125 micron, the metrology holes may, e.g., fall in the range of 114 to 130 microns and increasing in, e.g., 0.5 microns increments from 114 micron. When the wafer is preliminarily completed, a thin tool or stripped cladded core of a fiber known to be 125 micron in diameter is inserted through one of the larger diameter metrology holes. If it passes through such hole then it is withdrawn and inserted into the next smaller hole. This sequence is repeated until the tool or fiber fails to pass through a hole indicating the adjacent larger metrology hole is the proper size for all the array holes. Since the wafer manufacturer can identify the proper hole and relate it back to the photolithography artwork hole size, it then can determine the variation between the designed and the actual size of all array holes in the wafer dies at least in the respective metrology wafer region. For example, if the 125 micron tool first fails on a hole for which the photolith hole on the artwork was designed to produce a 121 micron metrology hole, then all holes in that region or on that wafer are 3.5 microns too large. Alternately, if the 125 micron tool first fails to pass through a metrology hole designed to be 128 micron then the manufacturer knows all holes are 3.5 microns too small. Corrective action can be taken before the wafer ships.
By placing the metrology hole patterns around the perimeter of the wafer, the differences or variation in hole sizes between designed and actual can be determined across the wafer.